Bimemory CPU
United States Patent Number 4,875,154
MICROCOMPUTER WITH DISCONNECTED, OPEN, INDEPENDENT, BIMEMORY ARCHITECTURE, ALLOWING LARGE INTERACTING, INTERCONNECTED MULTI-MICROCOMPUTER PARALLEL SYSTEMS ACCOMMODATING MULTIPLE LEVELS OF PROGRAMMER DEFINED HIERARCHY
Primary Examiner -- David L. Clark
Attorney, Agent or Firm -- Joseph J. Zito and William D. Hall
Date of the Patent: Oct 17, 1989
Introduction
Overview
Summary of the Invention
Description of Figures
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ABSTRACT
A bimemory Independent CPU (BICPU) microcomputer which is comprised of a known CPU chip provided with additional circuitry to enable CPU to interact in a multi BICPU microcomputer system. Each BICPU microcomputer in a system is supplied with an assigned standard memory mechanically and logically connected to it’s BICPU’s “A” bus circuits. The BICPU microcomputer is also provided with connectors enabling the CPU to be connected to system buses. Any number of BICPU microcomputers can be logically chained, linked, and treed in a simple logical bimemory independent pattern infinitely in as many dimensions as is reasonably desired, using one standard set of dedicated, simple, single line conductors (system buses) to mechanically interconnect any “B” or “C” bus circuits of two different BICPU microcomputers.