MICROCOMPUTER WITH DISCONNECTED, OPEN, INDEPENDENT, BIMEMORY ARCHITECTURE, ALLOWING LARGE INTERACTING, INTERCONNECTED MULTI-MICROCOMPUTER PARALLEL SYSTEMS ACCOMMODATING MULTIPLE LEVELS OF PROGRAMMER DEFINED HIERARCHY
Introduction
100% Scalable MIMD Computer Systems
Professors Patterson and Hennessy wrote their textbook, "Computer Architecture: A Quantitative Approach," during 1989 and 1990. They named the 137 top computer architects and five top institutions who helped them in their Acknowledgements. In Chapter 10 "Future Directions - The Roads to El Dorado," they wrote, "Practically since the first working computer, architects have been striving for the El Dorado of computer design: To compose a powerful computer by simply connecting many existing smaller ones. The user orders as many CPUs as he can afford and gets a commensurate amount of performance. Other advantages of MIMD may be highest absolute performance, faster than the largest uniprocessor, and highest reliability/availability (page 520) via redundancy."
The above paragraph proves 137 top computer architects and Professors Patterson and Hennessy were completely unaware of the bimemory CPU architecture of U.S. Patent No. 4,875,154, invented more than six years before 1989. Existing small (SISD) CPUs, retrofitted with bimemory architecture become bimemory CPUs, (BICPUs). Simply connect BICPUs to make 100% scalable MIMD massively parallel systems. Since Oct. 17, 1989, when this patent issued, the market value of main frame computer companies has declined tens of billions of dollars.
Limited versions of the patent are replacing their original CPUs. Intel's Pentium, Digital's Alpha, and Motorola, IBM, and Apple's Power PC series run the same microcode as original CPUs at much higher speeds. Bimemory architecture enables the Pentium CPU to execute roughly 1.7 more instructions per clock cycle as original 486 CPU, by using twin bimemory caches.
Large massively parallel systems of BICPUs execute trillions of interacting operations per second. Programmers define thousands of levels of hierarchy in these systems.
For many years computer scientists have known one basic object of the Ideal Computer System is to mimic "human thinking." Multi-BICPU systems mimic the human thinking of their programmers. Large complex communication networks, SDIO systems, Space Station systems, climate prediction systems, and data networks, require hundreds of trillions of interacting floating point operations per second. These problems are solvable with multi-BICPU systems. BICPUs solve the seven basic problems of SISD CPUs. See Col. 3, line 30 through Col. 5, line 41 of the above patent.
Simple buses interconnect BICPUs. The most complex logically connection in a massive bimemory computer system is one BICPU reading or writing, on the fly, in one of two memories. It is like two people talking with each other on the phone. On average, each set of system buses, contain three to six BICPUs. Your present programs run in primary mode without change. Programmers add parallel bimemory codes to your existing programs. Parallel programs change between primary and bimemory logic, on the fly.
The patent describes one massively parallel multi-BICPU MIMD system for modeling climate and other nonlinear chaotic turbulent flow, at Col 23, line 39 to Col 24, line 9. Individual BICPUs are turned on, turned off, added to, and removed from, system buses as needed without causing failure of the executing program logic of the running MIMD system. SDIO systems learn while operating. SDIO algorithms change on the fly, depending on which algorithms work best. When BICPUs fail in a running system, the remaining BICPUs create a new system on the fly and continue operating.
